Abstract:
A novel paralleling interleaved discharging (PID) approach is presented to reduce the output ripple and continuous input current
waveform in step-down switched capacitor (SC). Theoretical analysis and the computer simulation show that PID method
can reduce output ripple by a factor of three and improve output power level by 8. 7%. The PID method can provide a large
range of constant desired values of the output voltage for a given input voltage by paralleling.
